1. Overview
Radio filters represent operate on signals in the megahertz frequency ranges (medium frequency). This frequency range is the range used by most broadcast radio and television, and thus most rf devices will include some kind of filtering on the signals transmitted or received. Such filters are commonly used as building blocks to separate multiple frequency bands. Four general filters are developed:T1, being blocked, will let C1 charge itself to the supply voltage minus the base-emitter on voltage of transistor T2 and minus the forward voltage of diode D2:
(1.)| VC1 | = |
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C2 will charge negatively to:
(2.) VC2 = VCE(sat)-T2 - ( VBE(on)-T1 + VF-D1 )Here VCE(sat)-T2 is the collector-emitter saturation voltage of the conducting T2, VBE(on)-T1 is the base-emitter on voltage of T1 and VF-D1 is the forward voltage of D1.
Once in state 1 the circuit will charge the capacitors C1 and C2 as specified. The transition to state 2 will occur when the charging of C2 completes and the base-emitter current of T1 increases. This increase will raise the voltage over R1 thus pushing the base voltage of T2 through C1 down. T2 will decrease its conductance and the voltage over R4 will raise. This will increase the base voltage of T1 and the process will result in positive feedback which will switch the circuit to conduncting T1 and non-conducting T2. During state 2 the capacitors charging will take the reverse path.
In each state of the circuit, one of the capacitors is charging through the collector (R1 or R4) and the other capacitor is discharging through the base resistor (R3 or R2). The switching occurs when the capacitor charging throught the base resistor get charged. So this charging process should take longer, i.e. the base resistor should be greater than the collector resistor:
(3.) R2 > R4
(4.) R3 > R1
There is another condition for the resistors and it comes from the current amplification of each transistor, which is also called the dynamic forward current transfer ratio in common emitter circuit - h21e. R2 and R3 should conform to:
(5.) R2 < R1 * 0.5 * h21e-T1(6.) R3 < R4 * 0.5 * h21e-T2
Where 0.5 is a security factor. Finally, D1 and D2 are used to protect the base-emitter junctions of T1 and T2 from reverse voltage higher than the emitter-base maximum voltage of the used transistors. Normally, this voltage is around -5V for silicon NPN transistors. D1 and D2 are used when the power supply is higher than 5V. C3 and C4 are blocking (filtering) capacitors.
The charging effect of the capacitor through the collector resistor delivers non-rectangular output voltage from the schematic (see fig.1).
 fig.1 |
To obtain uniform rectangular output (fig.2) a variation of the schematic is shown below.
The period T of the periodic process can be approximately calculated with the following equation:
(7.) T = 0.7 * R2 * C2 + 0.7 * R3 * C1Here 0.7 * R2 * C2 is the time constant of state 1 of the circuit and 0.7 * R3 * C1 - of state 2 respectively.
The two output voltage levels V1 and V2 are determined as follows:
(8.) V1 = VCC
(9.) V2 = VCE(sat)-T2
Equation (8.) is valid if we assume that the leackage currents ICEO-T2, IL-C2 and IR-D3are neglected. VCE(sat)-T2 is the collector-emitter saturation voltage of T2.
3. Synthesis
The synthesis of the circuit generally starts with the selection of R1 and R4 resistors according to the needs of power load. Then the base resistors are selected using (5.) and (6.), but not to violate (3.) and (4.). After this step, the periods of state 1 and state 2 are chosen. Finally, the capacitance of C1 and C2 is calculated using (7.).
A sample printed circuit board layout (PCB layout) is shown below.